Many electronic devices or systems, such as computers, tablets, and cellular phones, include an integrated circuit (IC) formed in a silicon die. The IC includes I/O circuitry to exchange (send and receive) signals with other components inside or outside the die. Such I/O circuitry usually includes buffer circuits (e.g., output buffer circuits) to provide signals from the IC to other components. Buffer circuits are normally designed to operate at specific parameters that may include specific target impedance values (e.g., target resistance values). Variations in fabricating process, and operating voltage and temperature may cause the impedance values of some conventional buffer circuits to deviate from their target values. Conventional techniques have been introduced to calibrate such buffer circuits in order to maintain their target impedances. However, some of those conventional techniques may face challenges, such as an increase in platform size, complexity, calibrating time, cost, and other undesirable factors.